a. Using the bias scheme design tips, and assuming Vcc=9V, VBE(on) 0.7 V and a 3 of 120 in the circuit of Fig. 10.6a, specify E96 standard resistors 23 (Appendix F) to bias the BJT at lg = SN mA, where SN is your serial number in your section. b. Using the bias scheme design tips, and assuming VDD = 15 V, V,= 1.6 V and a ka W/L of 0.17 A/V in the circuit of Fig. 10.6a, specify E96 standard resistors (Appendix F) to bias the MOSFET at ID - SN mA and IR = IR2 = SN A, where SN is your serial number in your section. = c. Verify your design in part (b) using LTspice. In your simulation, change the default NMOS to 2N7002. You need to include the circuit's schematic and the simulation results of your design in your assignment submission. To do that in LTspice, click on Tools >> Copy bitmap to Clipboard. Then paste the copied image in your Word document. VDD 15 .op R1 R G R2 R RD R M1 2N7002 RS R Figure 10.7 Single supply biasing of a MOSFET amplifier circuit.