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a ) Write a behavioural VHDL code to implement a simple full adder circuit. Explain the logic and algorithm by adding meaningful and explanatory comments

a) Write a behavioural VHDL code to implement a simple full adder circuit. Explain the logic and algorithm by adding meaningful and explanatory comments in the code. Capture the screenshot of the source code in the Vivado software environment. (4 marks)
b) Synthesize and implement the design. Capture the screenshots of the schematic diagram produced by Vivado. You may combine a) and b) in one screenshot. (3 marks)
c) Write a test bench code to run the simulation. Capture the screenshot of the test bench code in Vivado development environment. (3 marks)
d) Capture the screenshot of the simulation output, and write down the interpretation of the output, and compare them with the theoretical values.

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