A1) Design a sequence recognizer (Mealy machine) for a sequence of '0010'. Look at the following example. Input X: Output Z: 0010 0101 1010 1110 1011 0010 1100 0101 1011... 0001 0000 0000 0000 0000 0001 0000 0010 0000 ... Draw a state diagram. (10 pts) Submit it during class. Draw a state table. Find input equations and output equations. Design a circuit by using D flip-flops. (10 pts) Submit it during class. Implement the circuit on a Basys3 board. (80 pts) The sequence (data) input X should be given by one of the push buttons on the FPGA board. Generate a 0.5 Hz clock using a clock divider. Use one LED to show this clock so that you can synchronize the input to this clock. Use two LEDs additionally, one for the data input (X) and the other for the output (Z). A1) Design a sequence recognizer (Mealy machine) for a sequence of '0010'. Look at the following example. Input X: Output Z: 0010 0101 1010 1110 1011 0010 1100 0101 1011... 0001 0000 0000 0000 0000 0001 0000 0010 0000 ... Draw a state diagram. (10 pts) Submit it during class. Draw a state table. Find input equations and output equations. Design a circuit by using D flip-flops. (10 pts) Submit it during class. Implement the circuit on a Basys3 board. (80 pts) The sequence (data) input X should be given by one of the push buttons on the FPGA board. Generate a 0.5 Hz clock using a clock divider. Use one LED to show this clock so that you can synchronize the input to this clock. Use two LEDs additionally, one for the data input (X) and the other for the output (Z).