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Advanced Digital Systems Design Course Assignment 2 0 % Solve the following questions, and upload your pdf solution on to Moodle. Don't forget to add

Advanced Digital Systems Design
Course Assignment 20%
Solve the following questions, and upload your pdf solution on to Moodle. Don't forget to
add your name & ID, and to number your pages.
For each question, show the design, test, and a screenshot of the results.
Q1: A carry look ahead generator circuit helps speed the process of adding binary numbers by
calculating the carry bits before the addition process begins. Assuming a 6-bit adder, and by
using Verilog design and testing:
Show how fast is the carry look ahead compared to the serial adder. Assume that the
propagation delay of any logic gate used ( AND, NAND, OR, NOR, NOT, XOR, XNOR) is
10ns.
Test the circuit by performing 3 tests on adding different numbers of your choice.
Q2: A logic circuit is required to detect the presence of five consecutive ones for a serial data
input line. Design this circuit using any type of flipflops of your choice.
Test your circuit using the following input sequence.
010111110111100
Random sequence of your choice.
Q3: Using counters and other logic devices, design a traffic light that operates as follows: Red
light for 9 seconds, Orange light for 3 seconds and green light for 12 seconds. Assume a clock
frequency of 1Hz. Show your work and results by testing the circuit for 60 seconds
Q4: Design a one-input, one-output serial 2's complementor. The circuit accepts a string of
bits from the input and generates the 2's complement at the output. The circuit can be
reset asynchronously to start and end the operation.
Test your circuit using the following input sequence.
010111110111100
Random sequence of your choice. ineed you to slove all question using verlog pleas
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