An advanced chip multiprocessor has processors (cores) of two sizes. There is one heavyweight processor (HWP) that runs heavyweight threads (HWT), and four lightweight processors (LWP) that run lightweight threads (LWT). The register file of an HWP has 8 times as many bits as the register file of an LWP. In this way, we can have threads with different-size _thread states_ running on the same processor chip. A context switch occurs when a thread must temporarily give up its processor. Analysis shows that, in time and energy, the cost of a context switch of a lightweight thread is roughly 1/8 the cost of a context switch of a heavyweight thread. What is the simplest explanation of this disparity? What provides the lion's share of the cost?