An annoying thing about CMOS is that it is naturally inverting so if you wanted to implement a function like Y = (A OR B) AND C. You might instead have to implement Y = NOT( (A OR B) AND C) and then tack on an inverter at the end to undo the extra NOT. Now suppose that in addition to the signals A, B and C, you also happened to have access to their inverses, (NOT A), (NOT B) and (NOT C). Show how you can use these signals in the design of a CMOS circuit that implements the original desired function, Y-(A OR B) AND C, without the extra inverter and the gate delay that it implies. Big Hint: use DeMorgan's law which is mentioned in the lecture slides. By the way can you see how DeMorgan's law helps explain how you can derive the structure of the pull-up network of a CMOS circuit from the pull-down network and vice versa