An RTM circuit (Lecture 6) has the following state: RO = 2 R1 = e R2 = 7 R3 = a During a clock cycle the inputs are: x = 3 (the data input) Id = 1 (the load control input) arith = 0 d = 2 (the destination address) sa = 3 (the address of the first operand) sb = 0 (the address of the second) At the following clock tick, this will happen: Select one: O a. e will be loaded into RO O b. c will be loaded into R2 O c. All registers will remain unchanged O d. All registers will be set to 0 O e. 3 will be loaded into R2