Analyze the circuit containing D flip-flops shown below by giving the value for Q1 and Q2 that result from each clock trigger. The flip-flops are positive-edge triggered so the question will ask about the values at the negative edges, by which time the flip-flop outputs should have settled. At time t = 0, Q1 = 0 and Q2 equal 0. Note that the flip-flops are commonly-clocked.

Q1 D Q Q2 CLK X1 X2 I 01 Q2 : T=1 T=2 T=3 T=4 T=5 T=0