ANswer according to table

Thats All what was written in the quesiton,nothing else

(4.19) This exercise explores energy efficiency and its relationship with performance. Problems in this exercise assume the following energy consumption for activity in Instruction memory, Registers, and Data memory. You can assume that the other components of the datapath spend a negligible amount of energy. I-Mem D-Mem Write Register Read 70p] Register Write 60p) D-Mem Read 140p) 140p) 120p] Assume that components in the datapath have the following latencies. You can assume that the other components of the datapath have negligible latencies. on R Rea ite D-Mer Rain Write D-Mem R/W Use the following Sri Supplied values instead of the textbook values. l-Mem Control Register ALU Read/Write 150ps 175ps 80ps 75 ps 225ps A) (4.19.1 [10])(Based on sections 4.3, 4.6, 4.14) How much energy is spent to execute an ADD instruction in a single-cycle design? B) How much energy is spent to execute an ADD instruction in the 5-stage pipelined design