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Answer questions 0 Tinerl A Set-Up 61 TAICCRO-4000: 62 TA1CCTL0l=CCIE: 3 TAICTL I-TASSEL 2 MC1 Counter value // Enable Timer1-A nterrupts SMCLK, Up Mode (Counts

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0 Tinerl A Set-Up 61 TAICCRO-4000: 62 TA1CCTL0l=CCIE: 3 TAICTL I-TASSEL 2 MC1 Counter value // Enable Timer1-A nterrupts SMCLK, Up Mode (Counts to TALCCRO) 7. Lines 60-63 use which Timer? 8. What sets the compare register to the count value? 9. What frequency is the input clock signal? 10. How often with the timer interrupt? 11. Output mode is used in this timer? 0 Tinerl A Set-Up 61 TAICCRO-4000: 62 TA1CCTL0l=CCIE: 3 TAICTL I-TASSEL 2 MC1 Counter value // Enable Timer1-A nterrupts SMCLK, Up Mode (Counts to TALCCRO) 7. Lines 60-63 use which Timer? 8. What sets the compare register to the count value? 9. What frequency is the input clock signal? 10. How often with the timer interrupt? 11. Output mode is used in this timer

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