ANWSER Q10 Q10 Q10

8. Full adder with NAND gates (11 Points) Test the full adder circuit from Figure 11.20 in the textbook (also on Slide 35, Ch. 11). Provide screenshots. a. b. Redesign the circuit, so it uses only two XOR gates and three NAND gates (each gate with only two inputs like in 7400 and 7486). Show the output function formulas for the outputs S and C. Test the circuit. Provide screenshots 9. Full adder with 8_to_1 multiplexer (6 Points) Design, directly from the truth table, the implementation of the full adder with two 8 to 1 multiplexers (like 74151). Provide screenshots a. 10. Two bit adder using the circuits from Exercises 8 and 9 (12 Points) Prepare the complete truth table for a two bit adder circuit. Include data inputs AiAo and BiBo, and all the outputs C2SiSo. a. b. Use the circuits already tested in Exercises 8 and 9 to assemble, and then test, the two bit adder. Test the circuit with all possible input combinations. Provide screenshots