Question
Assignment Requirement: All numbers are in base-10 unless otherwise noted If part of a problem is not solvable, explain why in the answer area 1
Assignment Requirement:
All numbers are in base-10 unless otherwise noted
If part of a problem is not solvable, explain why in the answer area
1. Assuming R0 contains 0x07842320 and R1 contains 0x30000000, write the contents of the memory locations below after the STR instruction writes to memory:
a. STR R0, [R1]; assuming little-endian convention:
Value at address 0x30000000 is ______
Value at address 0x30000001 is ______
Value at address 0x30000002 is ______
Value at address 0x30000003 is ______
b. STR R0, [R1]; assuming big-endian convention:
Value at address 0x30000000 is ______
Value at address 0x30000001 is ______
Value at address 0x30000002 is ______
Value at address 0x30000003 is ______
2. For each of the following operations, show the value of R0 in base-10 unsigned representation (e.g., If R0 = 4096, then R0 LSR #1 = 2048).
For these questions, assume that the register R0 contains an unsigned 32-bit integer (e.g., uint32_t) with a value of 4096 (0x00001000).
a. R0 LSR #10: _______________________________
b. R0 LSR #11: _______________________________
c. R0 LSR #12: _______________________________
d. R0 LSR #13: _______________________________
e. R0 LSL #18: _______________________________
f. R0 LSL #19: _______________________________
g. R0 LSL #20: _______________________________
h. R0 LSL #21: _______________________________
i. R0 ASR #16: _______________________________ (note abnormal ASR usage)
For these questions, assume that the register R0 contains an unsigned 32-bit integer (e.g., uint32_t) with a value of 4026531840 (0xF0000000).
j. R0 LSL #1: _______________________________
k. R0 LSR #1: _______________________________
l. R0 ASR #1: _______________________________ (note abnormal ASR usage)
3. For each of the following operations, show the value of R0 in base-10 signed representation (e.g., If R0 = -16, then R0 ASR #1 = -8).
For these questions, assume that the register R0 contains a signed 32-bit integer (e.g., int32_t) with a value of -2 (0xFFFFFFFE).
a. R0 ASR #1: _______________________________
b. R0 ASR #2: _______________________________
c. R0 ASL #1: _______________________________
d. R0 ASL #2: _______________________________
e. R0 ASL #29: _______________________________
f. R0 ASL #30: _______________________________
g. R0 ASL #31: _______________________________
h. R0 LSR #1: _______________________________ (note abnormal LSR usage)
Assume that the register R0 contains a signed 32-bit integer (e.g., int32_t) with a value of 2 (0x00000002).
i. R0 ASR #1: _______________________________
j. R0 ASR #2: _______________________________
k. R0 ASL #1: _______________________________
l. R0 ASL #2: _______________________________
m. R0 LSR #1: _______________________________ (note abnormal LSR usage)
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