Assume a direct mapped cache design that uses the following specifications.

Total memory size is 32 bytes (5 bit memory addresses). Cache usesblocks ?of size 4 bytes, and the cache holds 4 ?blocks ?(i.e., 16 bytes).

Cache contents during operation are as follows:?--?Tag?------>?|??-----------------------?Contents? ----------------------------->

What data is retrieved when the following addresses are used? - 10011

- 10001 - 10101 - 01001 - 11110