Assume a floating point pipeline with multiple execution units as shown in the following Figure. The address (integer) unit takes one clock. The FP adder and FP multiplier are fully pipelined and take 2 and 5 clocks respectively. If structural hazards are due to write-back contention, assume that the earliest instruction gets priority and other instructions are stalled.

Consider the following program:

LOOP LD F0,0(R2)

LD F4,0(R3)

MULTD F0,F0,F4

ADDD F2,F0,F2

ADDI R2,R2,#8

ADDI R3,R3,#8

SUB R5,R4,R2

BNE R5,R0,LOOP

Integer+LOAD/STORE EX FP Adder IF ID A1 A2 ME WB FP Multiplier M1 M2 M3 M4 M5 In the following table please show the timing diagram for this loop by indicating the stage in each clock for each instruction in the table, under the following assumptions. There is no forwarding or bypassing hardware except that the register file delivers the value written in a register if it is read in the same clock. The branch is handled by flushing the pipeline after the branch is detected, its target address is known and the condition is resolved in the ID stage a. T1 T2 T3 T4 TS T6 T7T8T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 IF ID EX ME WEB LD FO,0(R2) LD F4.0(R3) MULTD FO,FO,F4 ADDD F2,FO,F2 ADDI R2,R2,#8 ADDI R3R3#8 SUB R5,R4,R2 BNE R5,RO,loop TIME- Clocks per iteration. Integer+LOAD/STORE EX FP Adder IF ID A1 A2 ME WB FP Multiplier M1 M2 M3 M4 M5 In the following table please show the timing diagram for this loop by indicating the stage in each clock for each instruction in the table, under the following assumptions. There is no forwarding or bypassing hardware except that the register file delivers the value written in a register if it is read in the same clock. The branch is handled by flushing the pipeline after the branch is detected, its target address is known and the condition is resolved in the ID stage a. T1 T2 T3 T4 TS T6 T7T8T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 IF ID EX ME WEB LD FO,0(R2) LD F4.0(R3) MULTD FO,FO,F4 ADDD F2,FO,F2 ADDI R2,R2,#8 ADDI R3R3#8 SUB R5,R4,R2 BNE R5,RO,loop TIME- Clocks per iteration