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Assume a typical program has the following instruction type breakdown: Instruction Type Instruction percent Instruction Latencies Load 35 % 4 cycles Stores 10 % 4
Assume a typical program has the following instruction type breakdown: Instruction Type Instruction percent Instruction Latencies Load 35 % 4 cycles Stores 10 % 4 cycles Adds 50 % 2 cycles Multiplies 3 % 16 cycles Divides 2 % 50 cycles What is average CPI for the program? a. 8.6 b. 4.28 c. 7.88 d. 13.28 Suppose an 11- bit data word stored in memory as 10100111100. Using the Hamming algorithm, determine what check bits would be stored in memory and select the correct word after check bit insertion. a. 101001101100001 b. 101001101100000 c. 101001111100000 d. 101001101100010 How many check bits are needed if the Hamming error correction code is used to detect single bit error in a 720 -bit data word? a. 9 bits b. 10 bits C. 11 bits d. 8 bits Set-associative cache consists of 64 lines, or slots, divided into four- line sets. Main memory contains 4K blocks of 128 words each. Show the format of main memory addresses. a. Tag= 8bit, Set= 4bit, Word= Zbit b. Tag= 8bit, Set= 6bit, Word= 5bit c. Tag= 8bit, Set= 7bit, Word= 4bit O d. Tag= 6bit, Set= 5bit, Word= 8bit A microprocessor has an on-chip 2-way set associative cache with a total capacity of 8 kByte. Each line in cache can store sixteen 8-bit words. It has a total addressable space of 16 MBytes. Number of bits for tag (s-d) equal: a. 12 O b. 2 C. 4 d. 8 If the RAM has a two byte data word and address bits are grouped for direct mapping with a cache memory as follow: 14 bits 9 bits 5 bits What is the number of lines in the related cache? a. 32 b. 512 C. 6K d. 256
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