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Assume at clock cycle 0 the content of the register was 1 0 0 1 1 , and the input was * 1 0 1

Assume at clock cycle 0 the content of the register was 10011, and the input was *10110 What will be its contents after three clock cycles.
10110
10111
11010
Other: q,
The given register is asynchronous circuit *
True
False
The given register responds *
On positive edge
On negative level
On positive level
On negative edge
Other: q,
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