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Assume Computer XY has a 4 GB main memory and a direct - mapped ( L 1 ) cache ( there are no other cache
Assume Computer XY has a GB main memory and a directmapped L cache there are no other cache levels and no secondary or tertiary storage with a B line size. On XY cache hits take clock cycles, and cache misses take clock cycles. Also on XY if the CPU had disabled the cache and went directly to main memory, the main memory access time would be cycles.
If Program A was run on XY when XY had a KB L cache and A is a program that has a GB array of bit integers and essentially no other use of memory that is accessed in a sequential way and thus has high spatial locality of reference, what would the overall average memory access time be in terms of CPU clock cycles? If the cache was instead a fully associative cache, what effect would you expect that to have on memory access time for this scenario? NB: in cache memory discussions K is not instead it denotes
To calculate the hit rate, we need to determine the number of cache hits and cache misses.
Given:
Cache Line Size B
L Cache Size KB times bytes
Array Size GB of bit integers times bytes
We have previously calculated:
Number of cache lines
Total number of integers in the array
Number of cache lines needed to accommodate the array
Since the cache has cache lines and the number of cache lines needed to accommodate the array is all the memory blocks needed for the array can fit into the cache at some point.
Now, let's calculate the hit rate:
Number of cache hits Total number of accesses Number of cache misses
Total number of accesses Total number of integers in the array
Number of cache misses Number of cache lines needed to accommodate the array
So
Number of cache hits
Given:
Cache Line Size B
L Cache Size KB times bytes
Array Size GB of bit integers times bytes
Since the integers are bits bytes each, the array contains fractimes integers. With sequential access and high spatial locality, most accesses will hit in the cache after the initial miss that loads a line. Each line can hold frac integers, so the miss rate is effectively the fraction of accesses that require a new line to be loaded.
For a directmapped cache, each new line access after every integer accesses will likely result in a cache miss assuming no conflict or capacity misses, which is optimistic Thus, the miss rate can be approximated as frac
What is the overall hit rate here As said above for one line the hit rate was for computing or accessing the overall array elements what is the hit rate????
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