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Assume that Master M1 has a clock which is high for 2 units and low for 3 units, while Master M2 has a clock

Assume that Master M1 has a clock which is high for 2 units and low for 3 units, while Master M2 has a clock which is high for 1 unit and low for 2 units. After the bus has been idle for awhile, both masters issue a start at the same time. M1 is attempting to send byte 0010 1001 to slave 1011 101, while M2 is attempting to send byte 0110 0101 to slave 1001 001. Use graph paper to show a properly scaled and labeled drawing of the clock (SCL) and data (SDA) waveforms until they are done with this. To save time, you may just show key portions of the transaction(s). You should know which portions should be pointed out, but you are welcome to show all transitions if you are uncertain as to which should be highlighted. Assume that the master that looses the arbitration stops driving the clock line immediately upon losing the arbitration (that is, the loosing master does not continue to drive the clock for the remainder of the byte). Clearly label any places that the the clock changes, or that it could change, as the protocol progresses and clearly indicate which party is driving the bus at all times.

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The graph below shows the clock and data waveforms until they are done with this transaction The SCL line is shown in purple the SDA line is shown in ... blur-text-image

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