Question
Assume that the block offset is four bits and the index is four bits. What is the cache block size in bytes? words? double words?
Assume that the block offset is four bits and the index is four bits.
What is the cache block size in bytes? words? double words? How many sets does this cache have? Record both the amount of data and meta-data (in bits) this cache holds if it is direct-mapped, two-way set associative, and four-way set associative.
Simulate (i.e., complete the following table) the direct-mapped and four-way set associative cache with respect to the following series of memory accesses. Provide the reason for each miss. Assume the caches have no valid entries to begin with and use a least-recently-used (LRU) replacement policy.
| Memory Access | Direct-Mapped | 4-way Set Associative |
| 0x1001FEA0 | ||
| 0x1001EFA4 | ||
| 0x1001FEA8 | ||
| 0x100100A0 | ||
| 0x100100B0 | ||
| 0x100100C0 | ||
| 0x10011FA1 | ||
| 0x1001EEA2 | ||
| 0x1001EFAF | ||
| 0x100100A2 |
Write the valid entries in the final state of each cache using the format
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Hands On Database
Authors: Steve Conger
1st Edition
013610827X, 978-0136108276
