Assume that, the following instruction is fetched by a single-cycle processor: 00000000100000100000100000100010 . Assume that data memory is all zeros and that the processors registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

r2 r3 r4 0 256 128 19 32 13 61 16 2 (a) Translate this to an assembly instruction (b) What is the register number supplied to the register files "Read register 1 input? Is this register actually read and used? (c) What is the register number supplied to the register files "Read register 2" input? Is this register actually read and used? (d) What is the register number supplied to the register files "Write register" input? (e) What is the output of the sign-extend? (f) What is the output of the jump "Shift left 2" unit for this instruction word? (g) For the ALU and the two add units, what are their data input values? (h) Fill in the values of the control signals for this instruction in the table below. Jump Branch RegDst ALUSrc MemtoReg RegWrite MemReadMemWrite ALUop r2 r3 r4 0 256 128 19 32 13 61 16 2 (a) Translate this to an assembly instruction (b) What is the register number supplied to the register files "Read register 1 input? Is this register actually read and used? (c) What is the register number supplied to the register files "Read register 2" input? Is this register actually read and used? (d) What is the register number supplied to the register files "Write register" input? (e) What is the output of the sign-extend? (f) What is the output of the jump "Shift left 2" unit for this instruction word? (g) For the ALU and the two add units, what are their data input values? (h) Fill in the values of the control signals for this instruction in the table below. Jump Branch RegDst ALUSrc MemtoReg RegWrite MemReadMemWrite ALUop