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Assume that, the following instruction is fetched by a single-cycle processor: 00000000100000100000100000100010. Assume that data memory is all zeros and that the processors registers have

Assume that, the following instruction is fetched by a single-cycle processor: 00000000100000100000100000100010. Assume that data memory is all zeros and that the processors registers have the following values at the beginning of the cycle in which the above instruction word is fetched: image text in transcribed(a) Translate this to an assembly instruction.

(b) What is the register number supplied to the register files' "Read register 1" input? Is this register actually read and used?

(c) What is the register number supplied to the register files' "Read register 2" input? Is this register actually read and used?

(d) What is the register number supplied to the register files' "Write register" input? Is this register actually written? If so, what value is being written into this register?

(e) What is the output of the sign-exted?

(f) What is the output of the jump "Shift left 2" unit for this instruction word?

(g) For the ALU and the two add units, what are their data input values?

(h) Fill in the values of the control signals for this instruction in the table below

image text in transcribed

D HW5.pdf C file:///C/Users/brute/Dow nloads/HW5.pd Apps Web Authentication Welcome to Moodle Welco to the Canv Zy Home zyBooks WWorkday basspro S HW5.pdf ro ri r2 256 -128 19 -32 13 -6 -1 16 -2 1 D HW5.pdf C file:///C/Users/brute/Dow nloads/HW5.pd Apps Web Authentication Welcome to Moodle Welco to the Canv Zy Home zyBooks WWorkday basspro S HW5.pdf ro ri r2 256 -128 19 -32 13 -6 -1 16 -2 1

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