Assume that the instruction set architecture $($ISA$)$ of the processor designed in the previous question $($Q$1)$ consists of $12$ assembly instructions. Specify the instruction size, number of fields, and the size and name of each field for ADD R$2,$ R$3,$ RO$.$b$)$ What is the machine code for ADD R$2,$ R$3,$ RO$?$ You can suggest an appropriate interpretation for the addition process but in a logical Way