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Assume that to spell check a large file, 8 2 0 , 0 0 0 , 0 0 0 instructions are needed. The instructions in

Assume that to spell check a large file, 820,000,000 instructions are needed. The instructions in
the program are broken down into 4 different classes, and each class requires N clock cycles to
execute. Specific information is given in the table below. (Here, N is the same as in the RISC-V
multi-cycle datapath discussed in class.)
(i) If the total execution time for this program is found to be 1.57 seconds, what is the clock cycle
time of the computer on which it was run?
(ii) Assume that as part of the 820,000,000-instruction spell check, 25% of all load instructions are
immediately followed by an ALU / R-type instruction that uses the data that was just loaded. To
speed up this program, we are contemplating adding a new type of instruction - an ALU instruction
where one of the source operands is a value from memory.
This new instruction will replace the previous, 2 instruction sequence.
It will take 7 clock cycles.
Will this change offer any speedup over the original design? If so, how much?
You may assume that the clock rate does not change and your answer to this question does not
depend on your answer to (i)
(iii) Qualitatively, if you see a speedup, where does it come from? If you do not, why not?
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