Assume the following information for questions 1-7. The page size for a virtual memory system is 8 KB. The instruction TLB is direct-mapped with 2 sets and each block contains one translation. The number of bits in a virtual address is 20. The number of bits in a physical address is 15.

(1) What is the number of virtual pages? (2) What is the number of physical pages? (3) How many bits are used in the virtual address for the page offset? (4) How many bits are used in the virtual address for the TLBindex? (5) How many bits are used in the virtual address for the TLBtag?