Question
Assume the following information: The average memory penalty for a cache miss is 72 clock cycles. Miss rate is 2.9%. 20% of instructions are data
Assume the following information: The average memory penalty for a cache miss is 72 clock cycles. Miss rate is 2.9%. 20% of instructions are data transfer instructions (loads/stores). CPI for a perfect cache is 1.5 clock cycles. The total number of instructions executed is IC. Answer the following questions: a. What is the total number of memory stall cycles? b. What is the number of Memory Stall Cycles (MSC) per instruction? c. What is the average CPI?
Step by Step Solution
There are 3 Steps involved in it
Step: 1
Get Instant Access to Expert-Tailored Solutions
See step-by-step solutions with expert insights and AI powered tools for academic success
Step: 2
Step: 3
Ace Your Homework with AI
Get the answers you need in no time with our AI-driven, step-by-step assistance
Get Started
The World Wide Web And Databases International Workshop Webdb 98 Valencia Spain March 27 28 1998 Selected Papers Lncs 1590
Authors: Paolo Atzeni ,Alberto Mendelzon ,Giansalvatore Mecca
1st Edition
3540658904, 978-3540658900
