Assume the following sequence of instructions. 1. lw $t2, 60($t1) 2. lw $t1, 40($t2) 3. sit $t1,$t1,$t2 4. sw $t1, 20($t2) 5. sll $t1,$t1, 2 Show the pipeline schedule diagram using forwarding from EX or MEM stages to any other stage, then compute the pipeline CPI. Assume we have a cache memory consisting of eight one- word blocks and the following sequence of block addresses: 8, 19, 12, 8, 12, 3, 19, 3. The cache is two-way set associative. Find the number of misses and the final content of the cache. Show your work. How many total bits are required for a direct-mapped cache with 32 KiB of data and 2-word blocks, assuming a 32-bit address? (Note: KiB means 2''Bytes, 1 word is 4 Bytes), Show your work