Assume the following: .. The memory is byte addressable .Memory accesses are to 1-byte words (not to 4-byte words). . Addresses are 12 bits wide .The cache is direct mapped cache (E 1), with a 16-byte block size (B-16) and 8 sets (S-8). . The cache con tents are as shown below Set #!Way #0 1:Tag-0x05; Data- 0x3f 0xd8 0x94 0x01 0: 0x4f 0x79 0xbc 0xf7 0x47 0x3f 0xd9 0x6a 0x85 0x5a 0x09 0x20 1:Tag=0x8d; Data- 0x28 0xc8 0x39 0x5a 0xa3 0xd3 0xb2 0x2a 0xc9 0x43 0x94 0xe0 Oxe9 0x31 0xbd 0xc4 1: V-1;Tag=0x09, D 0x18 0x08 0x64 0x35 2: 0x15 0xb1 0x2b 0xf2 0xdb 0x01 0x39 Oxaf Oxba 0xOb 0x49 0x11 V=0;Tag=0x11 ; Data 3: 1:Tag-0x04; Data- 0xc4 0xeb 0x2e 0x41 4: 0x5d 0x12 0x94 0xf7 Oxfb 0x0c 0xb6 0x72 Oxa7 0x49 0x65 0x17 1,Tag=0x19; Data 0x91 0x23 0x92 0x07 0xc0 0x56 0xd5 0x93 0x23 0x2f 0x93 0x29 0x46 0x61 0xd9 0x77 5: V-1:Tag-0x19; Data 0x78 0x62 0xf5 0x92 6: 0xdd 0x3f 0x52 0x7d 0xc5 0x7a 0x5a 0x34 0x01 0xec 0xc6 0x77 V=1;Tag=0x18; Da Oxea 0x31 Oxde Oxce 7: 0x08 0x0a 0xee 0x62 0xdb 0x50 0xc8 0xc3 0x20 0x6e 0x16 0x54 Assume the following: .. The memory is byte addressable .Memory accesses are to 1-byte words (not to 4-byte words). . Addresses are 12 bits wide .The cache is direct mapped cache (E 1), with a 16-byte block size (B-16) and 8 sets (S-8). . The cache con tents are as shown below Set #!Way #0 1:Tag-0x05; Data- 0x3f 0xd8 0x94 0x01 0: 0x4f 0x79 0xbc 0xf7 0x47 0x3f 0xd9 0x6a 0x85 0x5a 0x09 0x20 1:Tag=0x8d; Data- 0x28 0xc8 0x39 0x5a 0xa3 0xd3 0xb2 0x2a 0xc9 0x43 0x94 0xe0 Oxe9 0x31 0xbd 0xc4 1: V-1;Tag=0x09, D 0x18 0x08 0x64 0x35 2: 0x15 0xb1 0x2b 0xf2 0xdb 0x01 0x39 Oxaf Oxba 0xOb 0x49 0x11 V=0;Tag=0x11 ; Data 3: 1:Tag-0x04; Data- 0xc4 0xeb 0x2e 0x41 4: 0x5d 0x12 0x94 0xf7 Oxfb 0x0c 0xb6 0x72 Oxa7 0x49 0x65 0x17 1,Tag=0x19; Data 0x91 0x23 0x92 0x07 0xc0 0x56 0xd5 0x93 0x23 0x2f 0x93 0x29 0x46 0x61 0xd9 0x77 5: V-1:Tag-0x19; Data 0x78 0x62 0xf5 0x92 6: 0xdd 0x3f 0x52 0x7d 0xc5 0x7a 0x5a 0x34 0x01 0xec 0xc6 0x77 V=1;Tag=0x18; Da Oxea 0x31 Oxde Oxce 7: 0x08 0x0a 0xee 0x62 0xdb 0x50 0xc8 0xc3 0x20 0x6e 0x16 0x54