Assume the following: .The memory is byte addressable. .Memory accesses are to 1-byte words (not to 4-byte words). .. Addresses are 9 bits wide. . The cache is 2-way associative cache (E-2), with a 4-byte block size (B-4) and 2 sets (S-2) The following figure shows the format of an address (one bit per box). Indicate (by labeling the diagram) the fields that would be used to determine the following CO - The cache block offset CI- The cache set index CT The cache tag 7 4 A cache with this configuration could store a total of bytes of memory (ignoring the tags and valid bits). Please answer all parts of the question Assume the following: .The memory is byte addressable. .Memory accesses are to 1-byte words (not to 4-byte words). .. Addresses are 9 bits wide. . The cache is 2-way associative cache (E-2), with a 4-byte block size (B-4) and 2 sets (S-2) The following figure shows the format of an address (one bit per box). Indicate (by labeling the diagram) the fields that would be used to determine the following CO - The cache block offset CI- The cache set index CT The cache tag 7 4 A cache with this configuration could store a total of bytes of memory (ignoring the tags and valid bits). Please answer all parts of the