Assume the instruction memory is as follows for the MIPs architecture in Chapter 4 of the suggested text:

Address - Data

0x0000A000 - move $t0, $t0, $t1

0x0000A004 - add $t0, $t0, $t1

0x0000A008 - beq $t0, $t0, 0xFFFF

In a file (answer.pdf) answer the following questions:

1. Explain the signals set and operations of the 4 steps of execution when PC = 0x0000A004
2. Assuming PC = 0x0000A008, what is the value of PC after the instruction completes?
   1. What is the sign extended value (32-bit value)? Draw a schematic drawing of a sign extender.
   2. Why do we shift left by 2 and what is the value after doing this?
   3. What is the base-10 value of the output signals in 1.1 and 1.2 (remember two's compliment)?
3. What have we implemented here?
4. What is the result of the next instruction after [1]?

o 5x Add >Addresult ALU Shift left 2) Instruction (31-26] RegDst Branch MemRead MemtoReg Control ALUO MemWrite ALUSrc RegWrite Instruction (25-21) PC Read address Read register 1 Read Read Instruction (20-16] Zero Ins (31-0] Instruction memory ALU ALU data 1 register 2 Write Read Read Address data result Instruction (15-11) register data 2 Osx E. Write data Registers Write Data data memory Instruction (15-0) 32 Sign- extend ALU control Instruction (5-0) o 5x Add >Addresult ALU Shift left 2) Instruction (31-26] RegDst Branch MemRead MemtoReg Control ALUO MemWrite ALUSrc RegWrite Instruction (25-21) PC Read address Read register 1 Read Read Instruction (20-16] Zero Ins (31-0] Instruction memory ALU ALU data 1 register 2 Write Read Read Address data result Instruction (15-11) register data 2 Osx E. Write data Registers Write Data data memory Instruction (15-0) 32 Sign- extend ALU control Instruction (5-0)