b. The following figure shows the architecture of a MIPS Processor (pipelined version). Use RTL to describe all the steps that performed by MIPS to execute the following instructions. LW $6, 100 ($7) ADD $3, $2, $1 PCSre IDIEX EXMEM Contro IFID Ad Branch MEMWB RegWrite Shift Instructio Read Addr 1 Data Registe Read Read AddrPataA Wite Addr Read Memor emtoReg Address Read Data Address ALU Data 2 Write Data Write Data ALUMem Write MemRea Sign Exten32 ALUOp