Based on the MicroBlaze instruction set: CAN BE FOUND AT https://www.xilinx.com/support/documentation/sw_manuals/mb_ref_guide.pdf

a) Look for evidence that it is an FES type architecture. How many CPU registers does Microblaze have? How many instructions does Microblaze have listed and what percent of the instructions perform some type of memory access?

b) Set and determine if it is an example of an expanding opcode encoding. Specifically, make a list of the aspects used to design an expanding opcode encoding and see if the aspects are applied to Microblaze.

c) The Microblaze processor handles 32 bit data and also has 32 bit instructions. Discuss the size issue regarding immediate data and how the Microblaze processor overcomes this issue.

d) Hand encode the following Micro Blaze instructions, give your answer in hexadecimal i) Use ADDI to add the constant value $A2B3 to R5 and save the result to R6 ii) Use the ADDC instruction to add the contents of registers R8 and R9, then save the sum in register R7 iii) Use IMM and LWI to read a value from memory, starting with the base address $003B35A3, using an offset stored in R8, and having the value read into R9