Build a 3-bit counter which counts in the following sequence: 0,5,2,7,4,1,6,0. When CE is high on the clock edge the current value of the counter advances to the next number in the counting sequence. So 0,5,2,7,4,1,6,0,5,2,7,4,1,6,0 is the sequence of states this counter will go through when CE is high. When CE is low the counter stays in the same state. You may use only 3 D Flip-Flops and logic gates. The counter's 3 output bits must come directly from the Flip-Flops. The counter should also have a TC output which is high at 6 (the last state before the sequence is repeated)