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Building on the basic concepts you have presented above now formally design an asynchronous 2-bit binary up (or down) counter based on flip flops, using

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Building on the basic concepts you have presented above now formally design an asynchronous 2-bit binary up (or down) counter based on flip flops, using the logic ICs available in the electronics lab. Explain and analyse the operation of this sequential counter and show the final count table and timing diagram for a visible clock rate (say 1-3Hz). Now go on to design an asynchronous 4-bit binary up (or down) counter based on the logic ICs available in the electronics lab. Analyse and optimise this counter design to use with the company's production line to count the plastic components up to 7 per box, Show the final count table and timing diagram for a visible clock rate (say 1-3Hz) and then the oscilloscope output waveforms for a 1kHz clock signal. Include LED outputs. APENDIX A TTL Pin-Outs 5 7492Modulo 12 counter 7493-4-bit Counter 7495-4-bit Shift Register DLMOLOD OD De 74132 - Quad Schmitt NAND 74125 - Quad Active-Low Tristate DELLA 74126 - Quad Active High Tristate HEBOMMEO Y lo 74139-Dual 24 Decoder 74151 - 81 Multiplexer 74138 - 3:8 Decoder Miscellaneous Devices TOND V os 4000 God ONOV OR CMOS SCIOT78/9 BC547/8/9 BC557700 COM INC Deur v- ELLE BED Ged G 7400 - Qund 2-input NAND 7402 - Oudt NOR BIODID D 743 - und AND 74056 - Hex Open-Collector Inverter DDDDDDD 7410 - Triple 3input NAND CRELERDILDID 7411 - Triple 3-input AND 7413 - Quad Sh NANO 7434 - Her Schritt inverter ON 7430 - 3-put NAND 732 - Quad 2 OR 747-300 b 7-Segment Decoder BOARD 7472-Gated K 7474-DD-Type FF 7475 - Quad Latet 7478- DK 7483-48% Fut Adder 7485 -- Magnitude comparator 786 - Quad EX-OR T430-Decade Counter Building on the basic concepts you have presented above now formally design an asynchronous 2-bit binary up (or down) counter based on flip flops, using the logic ICs available in the electronics lab. Explain and analyse the operation of this sequential counter and show the final count table and timing diagram for a visible clock rate (say 1-3Hz). Now go on to design an asynchronous 4-bit binary up (or down) counter based on the logic ICs available in the electronics lab. Analyse and optimise this counter design to use with the company's production line to count the plastic components up to 7 per box, Show the final count table and timing diagram for a visible clock rate (say 1-3Hz) and then the oscilloscope output waveforms for a 1kHz clock signal. Include LED outputs. APENDIX A TTL Pin-Outs 5 7492Modulo 12 counter 7493-4-bit Counter 7495-4-bit Shift Register DLMOLOD OD De 74132 - Quad Schmitt NAND 74125 - Quad Active-Low Tristate DELLA 74126 - Quad Active High Tristate HEBOMMEO Y lo 74139-Dual 24 Decoder 74151 - 81 Multiplexer 74138 - 3:8 Decoder Miscellaneous Devices TOND V os 4000 God ONOV OR CMOS SCIOT78/9 BC547/8/9 BC557700 COM INC Deur v- ELLE BED Ged G 7400 - Qund 2-input NAND 7402 - Oudt NOR BIODID D 743 - und AND 74056 - Hex Open-Collector Inverter DDDDDDD 7410 - Triple 3input NAND CRELERDILDID 7411 - Triple 3-input AND 7413 - Quad Sh NANO 7434 - Her Schritt inverter ON 7430 - 3-put NAND 732 - Quad 2 OR 747-300 b 7-Segment Decoder BOARD 7472-Gated K 7474-DD-Type FF 7475 - Quad Latet 7478- DK 7483-48% Fut Adder 7485 -- Magnitude comparator 786 - Quad EX-OR T430-Decade Counter

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