By following the specified steps of the FSM-D model (a) - (g) design the Supermarket Billing System described below. You are not required to write any VHDL code for this exercise. (a) System Interface (b) Data-path Design (c) Data-path Interface Definition (d) Control Interface Definition (e) Control FSM Design (f) Test Cases System Inputs: CLOCK, RESET, ENABLE, ENTER, 16-bit PRICE, 16-bit QUANTITY System Outputs: 32-bit GRAND_TOTAL, DONE The system operation is as follows: When RESET is asserted, the module should output GRAND_TOTAL = HEX "00000000" When ENABLE is asserted HIGH then the system enabled for operation will accept values for PRICE, QUANTITY. Output GRAND_TOTAL will remain as the previous value. When ENTER is asserted the system computes the product of PRICE and QUANTITY to produce a partial product which is then added to the GRAND_TOTAL. If the GRAND TOTAL is above $500 then a discount of $50 is applied to the GRAND_TOTAL. DONE is asserted for one (1) clock cycle after GRAND_TOTAL is computed.