c) 0100111101001111 #4 Suppose a byte-addressable computer using set associative cache has 32M bytes of main memory and a cache of 16 blocks and each cache Block contains 64 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache? #5 Rraw and describe Dynamic Address translation in paging