(c) Figure Q2(c) shows the content of each general purpose registers involved and the conditions codes register as the following instruction executed. Determine the result and CPSR flag after each of the instruction. start: ldr ro, =0xFAB90000 idr ri, =0x00000025 ldr r2, 0xCF239856 ldr r3, OxBB177474 ldr r4, =0x12340000 ldr r5, =0x0000003A ldr r6, =0xFFFFFFFE ldr r7, =OXAD351414 idr r8, =0x897154F1 ldr r9, =0xFEA51234 ldr r10, =0x1234ABCD ldr rll, =0xFFFFFFFF adds r8, ro, r4 sub r5, r1, r2 mov r2, r3 adcs r10, r3, r7 rsbs r3, r9, r8 muls r9, rl, r5 sbcs r3, rll, r6 .end Figure Q2(c) (i) sub r5, r1,12 [2 marks] ades r10, r3, r7 [2 marks] muls r9, r1, r5 [2 marks] (c) Figure Q2(c) shows the content of each general purpose registers involved and the conditions codes register as the following instruction executed. Determine the result and CPSR flag after each of the instruction. start: ldr ro, =0xFAB90000 idr ri, =0x00000025 ldr r2, 0xCF239856 ldr r3, OxBB177474 ldr r4, =0x12340000 ldr r5, =0x0000003A ldr r6, =0xFFFFFFFE ldr r7, =OXAD351414 idr r8, =0x897154F1 ldr r9, =0xFEA51234 ldr r10, =0x1234ABCD ldr rll, =0xFFFFFFFF adds r8, ro, r4 sub r5, r1, r2 mov r2, r3 adcs r10, r3, r7 rsbs r3, r9, r8 muls r9, rl, r5 sbcs r3, rll, r6 .end Figure Q2(c) (i) sub r5, r1,12 [2 marks] ades r10, r3, r7 [2 marks] muls r9, r1, r5 [2 marks]