C++ Programming Question:

Objective

Create a circuit simulator which reads a circuit definition (as described below) and an input vector definition (also described below) and simulates the operation of the circuit over time (up to 60 time steps of simulation time or until the circuit output no longer changes).

Description

Detailed Problem Statement: Develop a digital simulator which reads a circuit description and input vector from files (formats described below) and performs the digital simulation based on these definitions. The simulation is to be visualized using a console window.

Circuit File Format: In general, a circuit definition has the following format:

CIRCUIT HEADER

INPUT PAD DEFINITIONS (as many as necessary)

OUTPUT PAD DEFINITIONS (as many as necessary)

GATE DEFINITIONS (as many as necessary)

Where:

The CIRCUIT HEADER consists of the keyword CIRCUIT and a circuit name. You may use this name to label the circuit, or simple ignore the line. For example: CIRCUIT Circuit1

The CIRCUIT HEADER will be followed by an unspecified number of INPUT PAD DEFINITIONS. An INPUT PAD DEFINITION will consist of the keyword INPUT followed by a name label and a wire number. For example, the following line denotes that input pad A is associated with wire number two: INPUT A 2

NOTE: although the example circuit files use single-letter names, your simulator should accommodate names of more than one letter.

The INPUT PAD DEFINITIONS will be followed by an unspecified number of OUTPUT PAD DEFINITIONS. An OUTPUT PAD DEFINITION will have the same format as an INPUT PAD DEFINITION, except the keyword will be OUTPUT rather than INPUT. For example, the following line denotes that output pad E is associated with wire number six: OUTPUT E 6

The OUTPUT PAD DEFINITIONS will be followed by an unspecified number of GATE DEFINITIONS. A GATE DEFINITION consists of the gate type (one of NOT, AND, OR, XOR, NAND, NOR, and XNOR) followed by an integer delay value with its nanosecond units, followed by the input wire numbers (two input wires for all gates, except a NOT gate which uses only one), followed finally by an output wire number: For example, the following line defines an AND gate with a 5 nanosecond delay and having wire 1 and 2 for input and wire 4 for output: AND 5ns 1 2 4

Result: Your program should read the circuit file and produce an in-memory representation of the circuit which can be simulated using the information from the vector file (see below) as the initial starting conditions.

Vector File Format: An input vector definition has the following format:

VECTOR HEADER

INPUT PAD VALUE DEFINITIONS (as many as necessary)

Where:

The VECTOR HEADER consists of the keyword VECTOR and a vector name. You may use this name to label the simulation output, or you may simply ignore the line. For example: VECTOR vector1

The VECTOR HEADER will be followed by an unspecified number of INPUT PAD VALUE DEFINITIONS. An INPUT PAD VALUE DEFINITION consists of the keyword INPUT followed by a name label, followed by a time stamp at which the wire associated with the name value changes its value, and then by the value to which the wire changes. For example, the line below indicates that input A changes value at time 0 to a value of 1: INPUT A 0 1

Result: Your program should read the vector file and initialize a priority queue of events (one event for each INPUT PAD VALUE DEFINITION).

Three-valued Digital Logic: The wires in our digital circuit can take on 3 values: 0, 1, and X (undefined). The outputs pads and all gate outputs should be initialized to X at time zero. The truth values for three-valued AND and OR operations appears below, from these tables you should be able to determine the remainder of the gate operations.

Three-Value Truth Table

X	Y	X AND Y	X OR Y
0	0	0	0
0	1	0	1
0	x	0	x
1	0	0	1
1	1	1	1
1	x	x	1
X	0	0	x
X	1	x	1
X	x	x	x

Other Requirements: Your program must perform basic error handling on the input files (however, exception handling is not required). For example, you should gracefully handle File not found and detect format errors in input files. Any ill-formed input lines should simply be ignored. You do not have to check that the circuit being input makes sense; e.g., you dont have to test that circuit inputs can effect the outputs, etc.

Your program should provide a record of the simulation by showing the input and output pad histories of the simulated circuit in a console window.

Output: Your simulator should have the capability to display the input and output waveforms. The display can just use text characters in the console window to show the waveform. For example:

Input A XXXXX000000000001111111111111111111

Time 0 5 10

(or)

Input A xxxxxx_________-------------------------

Time 0 5 10

Classes: As far as I can tell I'm going to need wire, gate, event, and que classes.

Overview

1.You need to read in a circuit description

Consists of list of gates with their delay and what wires they connect to. Examples.

With that description, youll create an internal (or in-memory) data structure which represents the circuit

E.g., if Wire #4 is an input to a NAND Gate, then Wire #4 will have a pointer to NAND Gate

2.Read in a set of input tests, called the input vector, to initialize the simulation queue.

The input vector is simply the set of initial test conditions to exercise

E.g., INPUT A 4 1 means at time 4, set input A to 1

3.Conduct simulation

Cause input values to propagate to outputs

4.Visualize (i.e., print) results in a console window.

Big picture

1.Parse circuit file to create in-memory data structure of Gates and Wires to simulate

2.Parse the vector file to initialize the simulation Queue with initial Wire state (i.e., value) changes

3.Simulate the circuit using Event-driven control by

Removing the top Event e in the Queue

Determining if e causes a future Wire state change

Create and queue any future Wire state changes as new Events

Apply es effects

4.Print the results of the simulation

Below are some examples of the circuits being read:

CIRCUIT SimpleCircuit INPUT A 1 INPUT B 2 OUTPUT C 3 AND 3ns 1 2 3 

CIRCUIT MissingWire INPUT A 1 INPUT B 3 OUTPUT C 4 AND 3ns 1 3 4 

CIRCUIT MultiGate INPUT A 1 INPUT B 3 INPUT C 4 OUTPUT D 5 OUTPUT E 6 NOT 2ns 1 2 AND 3ns 2 3 5 OR 3ns 4 5 6 

NOTE: Ok I know this is kind of big, but I've been working on this for a long time and am getting no where. I'm not ever sure if what I'm doing is right and I just could really use some help. At this point I'll take whatever advice/ help I can get.