C

to decode the $32k8$ memory blocks $($EPROMs and SRAMs$)$ controlled by Ys$.$

Addresses available start $50000H$ and another D$0000.$

How many memory block required from EPROMs and SRAMs?

Determine the typical range address of added EPROMs and SRAMs?

Determine the range of each memory block controlled by Ys$?$

Design and draw the memory decoding using $74138$ circuitries in which the