Can someone please show me what this should look like?

Design of 4-bit expandable ALU-Shift-Register The final ALU system supposed to function, basically, as those used in the micro-architecture handout with minor modifications as follows: The function of ALU is defines by the control lines FO F1 F2. Inputs to ALU are 4-bit (A3 A2 A1 A0), 4-bit (B3 B2 B1 B0), and any other required input(s) to make the ALU an expandable system; Outputs are 4-bit (Q3 Q2 QI Qo, 1-bit N ("1" if Q is Negative), and 1-bit .1 Q is Zero), and any other required output(s) to make the ALU an expandable system. FO, F1, F2 defined as follows: FO, F1, F2 0,0,0 0,0,1 0,1,0 0,1,1 1,0,0 Function Q=Aplus B Q = A and B Q=A Q=not A Q A minus B Design of 4-bit expandable ALU-Shift-Register The final ALU system supposed to function, basically, as those used in the micro-architecture handout with minor modifications as follows: The function of ALU is defines by the control lines FO F1 F2. Inputs to ALU are 4-bit (A3 A2 A1 A0), 4-bit (B3 B2 B1 B0), and any other required input(s) to make the ALU an expandable system; Outputs are 4-bit (Q3 Q2 QI Qo, 1-bit N ("1" if Q is Negative), and 1-bit .1 Q is Zero), and any other required output(s) to make the ALU an expandable system. FO, F1, F2 defined as follows: FO, F1, F2 0,0,0 0,0,1 0,1,0 0,1,1 1,0,0 Function Q=Aplus B Q = A and B Q=A Q=not A Q A minus B