Can you help me create a 4 bit register made from D flip flops using Verilog code? I.e. using a 1-bit DFF, create a module that has (4) 1-bit DFF, which creates a 4-Bit register. The 1-bit DFF stores the data at every posedge of the clk signal. I also need to add (2) extra features : load enable, and reset. Using combinational logic to manipulate the data that is going into the DFF.