can you help me with my code. When i pass these text example$1"$A$000$A$101$A$202$A$303$A$404$A$505$A$606$A$707$A$808$A$909$AA$0$AAB$0$BAC$0$CAD$0$DAE$0$EAF$0$F$"$ and example$2"$A$101$A$2019010$F$0040112$EFF$8"$ the output shoud be as shown in image, but it is not and this is my code:

#include

#include

#define MEMORY$\_$SIZE $4096$

#define REGISTER$\_$COUNT $16$

typedef struct $\{$

unsigned short memory$[$MEMORY$\_$SIZE$]$;

unsigned short registers$[$REGISTER$\_$COUNT$]$;

unsigned short pc;

unsigned short status$\_$flags;

$\}$ CPU;

enum Opcode $\{$

ADD $=0$x$0,$ SUB $=0$x$1,$ MUL $=0$x$2,$ DIV $=0$x$3,$ AND $=0$x$4,$ ORR $=0$x$5,$ NOT $=0$x$6,$

MOV $=0$xA$,$ LDR $=0$xB$,$ STR $=0$xC$,$ JMP $=0$xE$,$ JEQ $=0$xF

$\}$;

void initialize$\_$cpu$($CPU $*$cpu$)\{$

memset$($cpu$->$memory, $0,$ sizeof$($cpu$->$memory$))$;

memset$($cpu$->$registers, $0,$ sizeof$($cpu$->$registers$))$;

cpu$->$pc $=0$;

cpu$->$status$\_$flags $=0$;

$\}$

void process$\_$input$($CPU $*$cpu$)\{$

unsigned short instruction;

int i $=0$;

while $($scanf$("\%4$hx$",$ &instruction$)!=$ EOF$)\{$

if $($i $>=$ MEMORY$\_$SIZE$)\{$

printf$("$Error: Memory is full, cannot read more instructions

$")$;

break;

$\}$

cpu$->$memory$[$i$++]=$ instruction;

$\}$

if $($i $<$ MEMORY$\_$SIZE$)\{$

cpu$->$memory$[$i$]=0$xDEAD; $//$ Termination instruction

$\}$ else $\{$

printf$("$Error: Memory is full, cannot add termination instruction

$")$;

$\}$

$\}$

void execute$\_$instruction$($CPU $*$cpu$,$ unsigned short opcode, unsigned short operands$)\{$

unsigned short r$1,$ r$2,$ r$3,$ rdest, raddr, rsrc$,$ constant;

short offset;

switch $($opcode$)\{$

case ADD: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; r$3=$ operands & $0$x$00$F; cpu$->$registers$[$r$1]=$ cpu$->$registers$[$r$2]+$ cpu$->$registers$[$r$3]$; break;

case SUB: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; r$3=$ operands & $0$x$00$F; cpu$->$registers$[$r$1]=$ cpu$->$registers$[$r$2]-$ cpu$->$registers$[$r$3]$; break;

case MUL: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; r$3=$ operands & $0$x$00$F; cpu$->$registers$[$r$1]=$ cpu$->$registers$[$r$2]*$ cpu$->$registers$[$r$3]$; break;

case DIV: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; r$3=$ operands & $0$x$00$F; cpu$->$registers$[$r$1]=$ cpu$->$registers$[$r$2]/$ cpu$->$registers$[$r$3]$; break;

case AND: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; r$3=$ operands & $0$x$00$F; cpu$->$registers$[$r$1]=$ cpu$->$registers$[$r$2]$ & cpu$->$registers$[$r$3]$; break;

case ORR: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; r$3=$ operands & $0$x$00$F; cpu$->$registers$[$r$1]=$ cpu$->$registers$[$r$2]|$ cpu$->$registers$[$r$3]$; break;

case NOT: r$1=($operands & $0$xF$00)>>8$; r$2=($operands & $0$x$0$F$0)>>4$; cpu$->$registers$[$r$1]=$ ~cpu$->$registers$[$r$2]$; break;

case MOV: r$1=($operands & $0$xF$00)>>8$; constant $=$ operands & $0$x$0$FF; cpu$->$registers$[$r$1]=$ constant; break;

case LDR: rdest $=($operands & $0$xF$00)>>8$; raddr $=($operands & $0$x$0$F$0)>>4$; cpu$->$registers$[$rdest$]=$ cpu$->$memory$[$cpu$->$registers$[$raddr$]]$; break;

case STR: rsrc $=($operands & $0$xF$00)>>8$; raddr $=($operands & $0$x$0$F$0)>>4$; cpu$->$memory$[$cpu$->$registers$[$raddr$]]=$ cpu$->$registers$[$rsrc$]$; break;

case JMP: offset $=$ operands & $0$x$0$FFF; if $($offset & $0$x$0800)\{$ offset $|=0$xF$000$; $\}$ cpu$->$pc $+=$ offset; break;

case JEQ: if $($cpu$->$status$\_$flags $==1)\{$ offset $=$ operands & $0$x$0$FFF; if $($offset & $0$x$0800)\{$ offset $|=0$xF$000$; $\}$ cpu$->$pc $+=$ offset; $\}$ break;

default: printf$("$Invalid opcode: $\%$X

$",$ opcode$)$; return;

$\}$

$\}$

void simulate$\_$cpu$($CPU $*$cpu$)\{$

while $($cpu$->$memory$[$cpu$->$pc$]!=0$xDEAD$)\{$

unsigned short instruction $=$ cpu$->$memory$[$cpu$->$pc$++]$;

unsigned short opcode $=$ instruction $>>12$;

unsigned short operands $=$ instruction & $0$x$0$FFF;

execute$\_$instruction$($cpu$,$ opcode, operands$)$;

$\}$

$\}$

void display$\_$output$($CPU $*$cpu$)\{$

for $($int i $=0$; i $<$ REGISTER$\_$COUNT; i$++)\{$

printf$("$register $\%2$d: $0$x$\%04$X

$",$ i$,$ cpu$->$registers$[$i$])$;

$\}$

printf$("$register PC: $0$x$\%04$X

$",$ cpu$->$pc$)$;

for $($int i $=0$; i $<$ MEMORY$\_$SIZE; i $+=16)\{$

printf$("0$x$\%04$X: $",$ i$)$;

for $($int j $=0$; j $<16$; j $+=2)\{$

printf$("\%04$X $",$ cpu$->$memory$[$i $+$ j$])$;

$\}$

printf$("$

$")$;

$\}$

$\}$

int main$()\{$

CPU cpu;

initialize$\_$cpu$($&cpu$)$;

process$\_$input$($&cpu$)$;

simulate$\_$cpu$($&cpu$)$;

display$\_$output$($&cpu$)$;

return $0$;

$\}$

$2\mathrm{.}10\mathrm{.}1$ Example $1$

regiater $11$: OrDooB

register $12$: $0$xDooc

register $13$: $0$xDooD

regiater $14$: OxDO$0$E

register $15$: Or$000$F

register PC: OxDO$22$

Ox$0000$: A$0001101$ k