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CET 363 Digital Circuits Prof. Zanella HW 4b 1. Setup the K-Map for the following truth table. Write the reduced expression for X. A B

CET 363 Digital Circuits Prof. Zanella

HW 4b

1. Setup the K-Map for the following truth table. Write the reduced expression for X.

A

B

C

X

0

0

0

1

0

0

1

0

0

1

0

1

0

1

1

0

1

0

0

1

1

0

1

0

1

1

0

0

1

1

1

1

2. Mark the correct row and column headings for the K-Map given. Circle groups of ones and write the reduced Boolean expression from the K-Map.

CD

CD

CD

CD

AB

1

0

1

1

AB

1

1

0

0

AB

0

0

0

0

AB

0

1

1

1

3. Design a logic circuit that will inhibit the passage of an input signal only when control inputs B and C are LOW at the same time that D is HIGH. The output is to be HIGH in the inhibited condition. Show the truth table and reduced expression for the output.

CET 363 Digital Circuits Prof. Zanella HW 4b 1. Setup the K-Map for the following truth table. Write the reduced expression for X. A B C X 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 2. Mark the correct row and column headings for the K-Map given. Circle groups of ones and write the reduced Boolean expression from the K-Map. CD CD CD CD AB 1 0 1 1 AB 1 1 0 0 AB 0 0 0 0 AB 0 1 1 1 CET 363 HW CH 4c 1. Design a logic circuit that will inhibit the passage of an input signal only when control inputs B and C are LOW at the same time that D is HIGH. The output is to be HIGH in the inhibited condition. Show the truth table and reduced expression for the output.

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