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Compete the following table showing which control signals should be asserted for the StoreI instruction: Step RTN Time P 5 P 4 P 3 P

Compete the following table showing which control signals should be asserted for the StoreI instruction:

Step RTN Time P5 P4 P3 P2 P1 P0 Cr IncrPC MR MW LALT
Fetch MAR <-- PC T0
IR <-- M[MAR] T1
Decode IR[15-12] PC <-- PC + 1 T2
Execute MAR <-- X T3
MBR <-- M[MAR] T4
MAR <-- MBR T5
MBR <-- AC T6
M[MAR] <-- MBR T7

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