$[$Computer Architecture$]$

a$.$What is the cache block size $($in words$)?$

b$.$How many entries does the cache have?

c$.$How many blocks are replaced?

d$.$What is the hit ratio? Cache Memory

For a direct$-$mapped cache design with a $32-$bit address,

the following bits of the address are used to access the cache.

a$.$ What is the cache block size $($in words$)?(5$pts$)$

b$.$ How many entries does the cache have? $(5$pts$)$

Starting from power on$,$ the following byte$-$addressed cache references

are recorded.

c$.$ How many blocks are replaced? $(5$pts$)$

d$.$ What is the hit ratio? $(5$pts$)$