Computer Architecture questions
1. For this problem, assume that each instruction takes the same number of cycles, and use the code listed below addi xl, x0, 20 addi x7, x0, -2 beq x0, x0, L1 LOOP sd x1, x3 and xl, xl, x7 slli x7, x7, 1 bne x0, x1, LOOP ld xl, x3 L1: (a) [4 points] How many instructions does this program execute (there might be several iterations)? What is the total number of memory type instructions (load and store instructions)? What is the proportion of (b) [3 points] If we can get an 8x speedup for memory instructions by employing a new memory technology (c) [3 points] In the future, we can make the memory instructions as fast as we want. When we run the memory instructions? how much faster does the entire program run? same program with the new memory, what is the maximum possible theoretical overall speediup for this program? (d) [2 points] What is the final value of x1? What does this program do? Hint: Try changing the immediate on the first line 2. Consider two different processors with the same instruction set architecture. There are four types of instruc- tions: ALU, load, store, and branch. The clock rate and CPI of each implementation are given in the following table Processor Clock rate ALU LoadStore Branch 2 GHz 3 GHz 4 a Program P has 10 when P is run is as follows: instructions and is executed on each processor. The distribution of instructions executed ALU 55% Load 20% Store 15% Branch 10% (a) [3 points] Calculate the CPI when running P on each of processor A and B (b) [3 points] Which processor is faster, and by what speedup? (c) [3 points] For processor B, if we can choose either load or branch instructions to make twice as fast, which should we choose, and why? 1. For this problem, assume that each instruction takes the same number of cycles, and use the code listed below addi xl, x0, 20 addi x7, x0, -2 beq x0, x0, L1 LOOP sd x1, x3 and xl, xl, x7 slli x7, x7, 1 bne x0, x1, LOOP ld xl, x3 L1: (a) [4 points] How many instructions does this program execute (there might be several iterations)? What is the total number of memory type instructions (load and store instructions)? What is the proportion of (b) [3 points] If we can get an 8x speedup for memory instructions by employing a new memory technology (c) [3 points] In the future, we can make the memory instructions as fast as we want. When we run the memory instructions? how much faster does the entire program run? same program with the new memory, what is the maximum possible theoretical overall speediup for this program? (d) [2 points] What is the final value of x1? What does this program do? Hint: Try changing the immediate on the first line 2. Consider two different processors with the same instruction set architecture. There are four types of instruc- tions: ALU, load, store, and branch. The clock rate and CPI of each implementation are given in the following table Processor Clock rate ALU LoadStore Branch 2 GHz 3 GHz 4 a Program P has 10 when P is run is as follows: instructions and is executed on each processor. The distribution of instructions executed ALU 55% Load 20% Store 15% Branch 10% (a) [3 points] Calculate the CPI when running P on each of processor A and B (b) [3 points] Which processor is faster, and by what speedup? (c) [3 points] For processor B, if we can choose either load or branch instructions to make twice as fast, which should we choose, and why
