Computer Architecture You are to work on the design of a stack-based architecture. You are to develop the concrete RTL targeted to the architecture below for 2 operand and 1 operand instructions as defined by the following abstract RTL: 2 operand: M[SP+2]M[SP+1] op M[SP+2];SPSP+1 loperand: M[SP+1]opM[SP+1] Control of the operations has been paritioned into the following state diagram. IF: Instruction Fetch OPI Operand 1 Fetch OP2. Operand 2 Fetch EX/S : Execute and Store You should define the concrete RTL for each of the control states (IF, OP1, OP2, and EXS) such that it is common for both I and 2 operand instructions with the exception of the control signals to select the operation (op) and that OP2 is only executed for 2 operand instructions