Computer Organization and Architecture.

1) The goal for this exercise is to create a workload of ten memory accesses (in hexadecimal) that will cause ten TLB misses and ten Page Faults. You should be able to come up with such a workload on paper, but then you should run it in CAMERA to verify your work. You can specify a custom workload in CAMERA by clicking the button labeled "Self Generate Add. Ref. Str." and entering in the addresses you want to reference one at a time.

2) Given your sequence of memory accesses from Question 1, can you find a change to a single parameter (e.g. TLB size, page table size, memory size, etc...) that would result in the same number (ten) of TLB misses but result in fewer than ten page faults? Work through this on paper.