Consider a computer system with 2 levels of caches L1 and L2. L1 Cache has i-Cache and a D-Cache. The cache has a miss rate of 19.6% and the D-Cache has a miss rate of 10.2%. The miss penalty to L2 cache is 19 cycles. L2 cache miss rate is 63.5% and the miss penalty to the main memory is 123 cycles. The frequency of all data operations is 31.796. Assuming a processor with no memory stalls has a CPI of 2. What is the CPI with memory stalls? Select one: O a. 24.17 O b. 29.61 O c. 30.94 O d. 21.65 O e. 2527413.76 Of. None of the options