Question
Consider a hypothetical branch-if-equal instruction that is 32 bits long: 6 bits are used to encode the opcode 6 bits are used to encode one
Consider a hypothetical branch-if-equal instruction that is 32 bits long:
6 bits are used to encode the opcode
6 bits are used to encode one register number
6 bits are used to encode another register number
14 bits are used to encode an offset that will be added to the program counter (PC) if the branch ends up being taken, and a new instruction address is required. (The number is not in 2s complement form, and all 14 bits can encode a constant.)
Thus, the instruction syntax might be: BEQ R12, R11, X
If R12 == R11, the PC will be set to PC + X instead of PC + 4.
Assuming that the PC has already been incremented by 4 when the comparison for the BEQ instruction at address 5004 is made, how many instructions away from the BEQ instruction could we reach?
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