Question
consider a two - tier memory system consisting of cache (SRAM) and main memory (D RAM). The cache access time is 1 nsec and the
consider a two
-
tier memory
system consisting of cache (SRAM) and main memory (D
RAM).
The cache access time is 1
nsec and the main memory access time is 50 nsecs. (1 nsec = 1
́
10
-
9
secs).
(a)
What is the overall memory access time given a cache hit rate of 95%?
(b)
What will the cache hit rate need to be if the overall memory access time in (a) is to be
halved?
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Operating Systems Internals and Design Principles
Authors: William Stallings
8th edition
133805913, 978-0133805918
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